Crypto++ 8.9
Free C++ class library of cryptographic schemes
chacha_simd.cpp
1// chacha_simd.cpp - written and placed in the public domain by
2// Jack Lloyd and Jeffrey Walton
3//
4// This source file uses intrinsics and built-ins to gain access to
5// SSE2, ARM NEON and ARMv8a, Power7 and Altivec instructions. A separate
6// source file is needed because additional CXXFLAGS are required to enable
7// the appropriate instructions sets in some build configurations.
8//
9// SSE2 implementation based on Botan's chacha_sse2.cpp. Many thanks
10// to Jack Lloyd and the Botan team for allowing us to use it.
11//
12// The SSE2 implementation is kind of unusual among Crypto++ algorithms.
13// We guard on CRYTPOPP_SSE2_AVAILABLE and use HasSSE2() at runtime. However,
14// if the compiler says a target machine has SSSE3 or XOP available (say, by
15// way of -march=native), then we can pull another 150 to 800 MB/s out of
16// ChaCha. To capture SSSE3 and XOP we use the compiler defines __SSSE3__ and
17// __XOP__ and forgo runtime tests.
18//
19// Runtime tests for HasSSSE3() and HasXop() are too expensive to make a
20// sub-case of SSE2. The rotates are on a critical path and the runtime tests
21// crush performance.
22//
23// Here are some relative numbers for ChaCha8:
24// * Intel Skylake, 3.0 GHz: SSE2 at 2160 MB/s; SSSE3 at 2310 MB/s.
25// * AMD Bulldozer, 3.3 GHz: SSE2 at 1680 MB/s; XOP at 2510 MB/s.
26
27#include "pch.h"
28#include "config.h"
29
30#include "chacha.h"
31#include "misc.h"
32
33// Internal compiler error in GCC 3.3 and below
34#if defined(__GNUC__) && (__GNUC__ < 4)
35# undef CRYPTOPP_SSE2_INTRIN_AVAILABLE
36#endif
37
38#if (CRYPTOPP_SSE2_INTRIN_AVAILABLE)
39# include <xmmintrin.h>
40# include <emmintrin.h>
41#endif
42
43#if defined(__SSSE3__)
44# include <tmmintrin.h>
45#endif
46
47#if defined(__XOP__)
48# if defined(CRYPTOPP_GCC_COMPATIBLE)
49# include <x86intrin.h>
50# endif
51# include <ammintrin.h>
52#endif // XOP
53
54#if (CRYPTOPP_ARM_NEON_HEADER)
55# include <arm_neon.h>
56#endif
57
58#if (CRYPTOPP_ARM_ACLE_HEADER)
59# include <stdint.h>
60# include <arm_acle.h>
61#endif
62
63#if defined(CRYPTOPP_ALTIVEC_AVAILABLE)
64# include "ppc_simd.h"
65#endif
66
67// Squash MS LNK4221 and libtool warnings
68extern const char CHACHA_SIMD_FNAME[] = __FILE__;
69
70ANONYMOUS_NAMESPACE_BEGIN
71
72// ***************************** NEON ***************************** //
73
74#if (CRYPTOPP_ARM_NEON_AVAILABLE)
75
76template <unsigned int R>
77inline uint32x4_t RotateLeft(const uint32x4_t& val)
78{
79 return vorrq_u32(vshlq_n_u32(val, R), vshrq_n_u32(val, 32 - R));
80}
81
82template <unsigned int R>
83inline uint32x4_t RotateRight(const uint32x4_t& val)
84{
85 return vorrq_u32(vshlq_n_u32(val, 32 - R), vshrq_n_u32(val, R));
86}
87
88template <>
89inline uint32x4_t RotateLeft<8>(const uint32x4_t& val)
90{
91#if defined(__aarch32__) || defined(__aarch64__)
92 const uint8_t maskb[16] = { 3,0,1,2, 7,4,5,6, 11,8,9,10, 15,12,13,14 };
93 const uint8x16_t mask = vld1q_u8(maskb);
94
95 return vreinterpretq_u32_u8(
96 vqtbl1q_u8(vreinterpretq_u8_u32(val), mask));
97#else
98 // fallback to slower C++ rotation.
99 return vorrq_u32(vshlq_n_u32(val, 8),
100 vshrq_n_u32(val, 32 - 8));
101#endif
102}
103
104template <>
105inline uint32x4_t RotateLeft<16>(const uint32x4_t& val)
106{
107#if defined(__aarch32__) || defined(__aarch64__)
108 return vreinterpretq_u32_u16(
109 vrev32q_u16(vreinterpretq_u16_u32(val)));
110#else
111 // fallback to slower C++ rotation.
112 return vorrq_u32(vshlq_n_u32(val, 16),
113 vshrq_n_u32(val, 32 - 16));
114#endif
115}
116
117template <>
118inline uint32x4_t RotateRight<8>(const uint32x4_t& val)
119{
120#if defined(__aarch32__) || defined(__aarch64__)
121 const uint8_t maskb[16] = { 1,2,3,0, 5,6,7,4, 9,10,11,8, 13,14,15,12 };
122 const uint8x16_t mask = vld1q_u8(maskb);
123
124 return vreinterpretq_u32_u8(
125 vqtbl1q_u8(vreinterpretq_u8_u32(val), mask));
126#else
127 // fallback to slower C++ rotation.
128 return vorrq_u32(vshrq_n_u32(val, 8),
129 vshlq_n_u32(val, 32 - 8));
130#endif
131}
132
133template <>
134inline uint32x4_t RotateRight<16>(const uint32x4_t& val)
135{
136#if defined(__aarch32__) || defined(__aarch64__)
137 return vreinterpretq_u32_u16(
138 vrev32q_u16(vreinterpretq_u16_u32(val)));
139#else
140 // fallback to slower C++ rotation.
141 return vorrq_u32(vshrq_n_u32(val, 16),
142 vshlq_n_u32(val, 32 - 16));
143#endif
144}
145
146// ChaCha's use of x86 shuffle is really a 4, 8, or 12 byte
147// rotation on the 128-bit vector word:
148// * [3,2,1,0] => [0,3,2,1] is Extract<1>(x)
149// * [3,2,1,0] => [1,0,3,2] is Extract<2>(x)
150// * [3,2,1,0] => [2,1,0,3] is Extract<3>(x)
151template <unsigned int S>
152inline uint32x4_t Extract(const uint32x4_t& val)
153{
154 return vextq_u32(val, val, S);
155}
156
157// Helper to perform 64-bit addition across two elements of 32-bit vectors
158inline uint32x4_t Add64(const uint32x4_t& a, const uint32x4_t& b)
159{
160 return vreinterpretq_u32_u64(
161 vaddq_u64(
162 vreinterpretq_u64_u32(a),
163 vreinterpretq_u64_u32(b)));
164}
165
166#endif // CRYPTOPP_ARM_NEON_AVAILABLE
167
168// ***************************** SSE2 ***************************** //
169
170#if (CRYPTOPP_SSE2_INTRIN_AVAILABLE)
171
172template <unsigned int R>
173inline __m128i RotateLeft(const __m128i val)
174{
175#ifdef __XOP__
176 return _mm_roti_epi32(val, R);
177#else
178 return _mm_or_si128(_mm_slli_epi32(val, R), _mm_srli_epi32(val, 32-R));
179#endif
180}
181
182template <>
183inline __m128i RotateLeft<8>(const __m128i val)
184{
185#if defined(__XOP__)
186 return _mm_roti_epi32(val, 8);
187#elif defined(__SSSE3__)
188 const __m128i mask = _mm_set_epi8(14,13,12,15, 10,9,8,11, 6,5,4,7, 2,1,0,3);
189 return _mm_shuffle_epi8(val, mask);
190#else
191 return _mm_or_si128(_mm_slli_epi32(val, 8), _mm_srli_epi32(val, 32-8));
192#endif
193}
194
195template <>
196inline __m128i RotateLeft<16>(const __m128i val)
197{
198#if defined(__XOP__)
199 return _mm_roti_epi32(val, 16);
200#elif defined(__SSSE3__)
201 const __m128i mask = _mm_set_epi8(13,12,15,14, 9,8,11,10, 5,4,7,6, 1,0,3,2);
202 return _mm_shuffle_epi8(val, mask);
203#else
204 return _mm_or_si128(_mm_slli_epi32(val, 16), _mm_srli_epi32(val, 32-16));
205#endif
206}
207
208#endif // CRYPTOPP_SSE2_INTRIN_AVAILABLE
209
210// **************************** Altivec **************************** //
211
212#if (CRYPTOPP_ALTIVEC_AVAILABLE)
213
214// ChaCha_OperateKeystream is optimized for Altivec. However, Altivec
215// is supported by using vec_ld and vec_st, and using a composite VecAdd
216// that supports 64-bit element adds. vec_ld and vec_st add significant
217// overhead when memory is not aligned. Despite the drawbacks Altivec
218// is profitable. The numbers for ChaCha8 are:
219//
220// PowerMac, C++, 2.0 GHz: 205 MB/s, 9.29 cpb
221// PowerMac, Altivec, 2.0 GHz: 471 MB/s, 4.09 cpb
222
223using CryptoPP::uint8x16_p;
224using CryptoPP::uint32x4_p;
225using CryptoPP::VecLoad;
226using CryptoPP::VecLoadAligned;
227using CryptoPP::VecStore;
228using CryptoPP::VecPermute;
229
230// Permutes bytes in packed 32-bit words to little endian.
231// State is already in proper endian order. Input and
232// output must be permuted during load and save.
233inline uint32x4_p VecLoad32LE(const uint8_t src[16])
234{
235#if (CRYPTOPP_BIG_ENDIAN)
236 const uint8x16_p mask = {3,2,1,0, 7,6,5,4, 11,10,9,8, 15,14,13,12};
237 const uint32x4_p val = VecLoad(src);
238 return VecPermute(val, val, mask);
239#else
240 return VecLoad(src);
241#endif
242}
243
244// Permutes bytes in packed 32-bit words to little endian.
245// State is already in proper endian order. Input and
246// output must be permuted during load and save.
247inline void VecStore32LE(uint8_t dest[16], const uint32x4_p& val)
248{
249#if (CRYPTOPP_BIG_ENDIAN)
250 const uint8x16_p mask = {3,2,1,0, 7,6,5,4, 11,10,9,8, 15,14,13,12};
251 VecStore(VecPermute(val, val, mask), dest);
252#else
253 return VecStore(val, dest);
254#endif
255}
256
257// ChaCha's use of x86 shuffle is really a 4, 8, or 12 byte
258// rotation on the 128-bit vector word:
259// * [3,2,1,0] => [0,3,2,1] is Shuffle<1>(x)
260// * [3,2,1,0] => [1,0,3,2] is Shuffle<2>(x)
261// * [3,2,1,0] => [2,1,0,3] is Shuffle<3>(x)
262template <unsigned int S>
263inline uint32x4_p Shuffle(const uint32x4_p& val)
264{
266 return val;
267}
268
269template <>
270inline uint32x4_p Shuffle<1>(const uint32x4_p& val)
271{
272 const uint8x16_p mask = {4,5,6,7, 8,9,10,11, 12,13,14,15, 0,1,2,3};
273 return VecPermute(val, val, mask);
274}
275
276template <>
277inline uint32x4_p Shuffle<2>(const uint32x4_p& val)
278{
279 const uint8x16_p mask = {8,9,10,11, 12,13,14,15, 0,1,2,3, 4,5,6,7};
280 return VecPermute(val, val, mask);
281}
282
283template <>
284inline uint32x4_p Shuffle<3>(const uint32x4_p& val)
285{
286 const uint8x16_p mask = {12,13,14,15, 0,1,2,3, 4,5,6,7, 8,9,10,11};
287 return VecPermute(val, val, mask);
288}
289
290#endif // CRYPTOPP_ALTIVEC_AVAILABLE
291
292ANONYMOUS_NAMESPACE_END
293
294NAMESPACE_BEGIN(CryptoPP)
295
296// ***************************** NEON ***************************** //
297
298#if (CRYPTOPP_ARM_NEON_AVAILABLE)
299
300void ChaCha_OperateKeystream_NEON(const word32 *state, const byte* input, byte *output, unsigned int rounds)
301{
302 const uint32x4_t state0 = vld1q_u32(state + 0*4);
303 const uint32x4_t state1 = vld1q_u32(state + 1*4);
304 const uint32x4_t state2 = vld1q_u32(state + 2*4);
305 const uint32x4_t state3 = vld1q_u32(state + 3*4);
306
307 const unsigned int w[] = {1,0,0,0, 2,0,0,0, 3,0,0,0};
308 const uint32x4_t CTRS[3] = {
309 vld1q_u32(w+0), vld1q_u32(w+4), vld1q_u32(w+8)
310 };
311
312 // Precompute each block's initial counter state.
313 // Feed-forward uses 32-bit word adds.
314 const uint32x4_t state3_0 = state3;
315 const uint32x4_t state3_1 = Add64(state3, CTRS[0]);
316 const uint32x4_t state3_2 = Add64(state3, CTRS[1]);
317 const uint32x4_t state3_3 = Add64(state3, CTRS[2]);
318
319 uint32x4_t r0_0 = state0;
320 uint32x4_t r0_1 = state1;
321 uint32x4_t r0_2 = state2;
322 uint32x4_t r0_3 = state3_0;
323
324 uint32x4_t r1_0 = state0;
325 uint32x4_t r1_1 = state1;
326 uint32x4_t r1_2 = state2;
327 uint32x4_t r1_3 = state3_1;
328
329 uint32x4_t r2_0 = state0;
330 uint32x4_t r2_1 = state1;
331 uint32x4_t r2_2 = state2;
332 uint32x4_t r2_3 = state3_2;
333
334 uint32x4_t r3_0 = state0;
335 uint32x4_t r3_1 = state1;
336 uint32x4_t r3_2 = state2;
337 uint32x4_t r3_3 = state3_3;
338
339 for (int i = static_cast<int>(rounds); i > 0; i -= 2)
340 {
341 r0_0 = vaddq_u32(r0_0, r0_1);
342 r1_0 = vaddq_u32(r1_0, r1_1);
343 r2_0 = vaddq_u32(r2_0, r2_1);
344 r3_0 = vaddq_u32(r3_0, r3_1);
345
346 r0_3 = veorq_u32(r0_3, r0_0);
347 r1_3 = veorq_u32(r1_3, r1_0);
348 r2_3 = veorq_u32(r2_3, r2_0);
349 r3_3 = veorq_u32(r3_3, r3_0);
350
351 r0_3 = RotateLeft<16>(r0_3);
352 r1_3 = RotateLeft<16>(r1_3);
353 r2_3 = RotateLeft<16>(r2_3);
354 r3_3 = RotateLeft<16>(r3_3);
355
356 r0_2 = vaddq_u32(r0_2, r0_3);
357 r1_2 = vaddq_u32(r1_2, r1_3);
358 r2_2 = vaddq_u32(r2_2, r2_3);
359 r3_2 = vaddq_u32(r3_2, r3_3);
360
361 r0_1 = veorq_u32(r0_1, r0_2);
362 r1_1 = veorq_u32(r1_1, r1_2);
363 r2_1 = veorq_u32(r2_1, r2_2);
364 r3_1 = veorq_u32(r3_1, r3_2);
365
366 r0_1 = RotateLeft<12>(r0_1);
367 r1_1 = RotateLeft<12>(r1_1);
368 r2_1 = RotateLeft<12>(r2_1);
369 r3_1 = RotateLeft<12>(r3_1);
370
371 r0_0 = vaddq_u32(r0_0, r0_1);
372 r1_0 = vaddq_u32(r1_0, r1_1);
373 r2_0 = vaddq_u32(r2_0, r2_1);
374 r3_0 = vaddq_u32(r3_0, r3_1);
375
376 r0_3 = veorq_u32(r0_3, r0_0);
377 r1_3 = veorq_u32(r1_3, r1_0);
378 r2_3 = veorq_u32(r2_3, r2_0);
379 r3_3 = veorq_u32(r3_3, r3_0);
380
381 r0_3 = RotateLeft<8>(r0_3);
382 r1_3 = RotateLeft<8>(r1_3);
383 r2_3 = RotateLeft<8>(r2_3);
384 r3_3 = RotateLeft<8>(r3_3);
385
386 r0_2 = vaddq_u32(r0_2, r0_3);
387 r1_2 = vaddq_u32(r1_2, r1_3);
388 r2_2 = vaddq_u32(r2_2, r2_3);
389 r3_2 = vaddq_u32(r3_2, r3_3);
390
391 r0_1 = veorq_u32(r0_1, r0_2);
392 r1_1 = veorq_u32(r1_1, r1_2);
393 r2_1 = veorq_u32(r2_1, r2_2);
394 r3_1 = veorq_u32(r3_1, r3_2);
395
396 r0_1 = RotateLeft<7>(r0_1);
397 r1_1 = RotateLeft<7>(r1_1);
398 r2_1 = RotateLeft<7>(r2_1);
399 r3_1 = RotateLeft<7>(r3_1);
400
401 r0_1 = Extract<1>(r0_1);
402 r0_2 = Extract<2>(r0_2);
403 r0_3 = Extract<3>(r0_3);
404
405 r1_1 = Extract<1>(r1_1);
406 r1_2 = Extract<2>(r1_2);
407 r1_3 = Extract<3>(r1_3);
408
409 r2_1 = Extract<1>(r2_1);
410 r2_2 = Extract<2>(r2_2);
411 r2_3 = Extract<3>(r2_3);
412
413 r3_1 = Extract<1>(r3_1);
414 r3_2 = Extract<2>(r3_2);
415 r3_3 = Extract<3>(r3_3);
416
417 r0_0 = vaddq_u32(r0_0, r0_1);
418 r1_0 = vaddq_u32(r1_0, r1_1);
419 r2_0 = vaddq_u32(r2_0, r2_1);
420 r3_0 = vaddq_u32(r3_0, r3_1);
421
422 r0_3 = veorq_u32(r0_3, r0_0);
423 r1_3 = veorq_u32(r1_3, r1_0);
424 r2_3 = veorq_u32(r2_3, r2_0);
425 r3_3 = veorq_u32(r3_3, r3_0);
426
427 r0_3 = RotateLeft<16>(r0_3);
428 r1_3 = RotateLeft<16>(r1_3);
429 r2_3 = RotateLeft<16>(r2_3);
430 r3_3 = RotateLeft<16>(r3_3);
431
432 r0_2 = vaddq_u32(r0_2, r0_3);
433 r1_2 = vaddq_u32(r1_2, r1_3);
434 r2_2 = vaddq_u32(r2_2, r2_3);
435 r3_2 = vaddq_u32(r3_2, r3_3);
436
437 r0_1 = veorq_u32(r0_1, r0_2);
438 r1_1 = veorq_u32(r1_1, r1_2);
439 r2_1 = veorq_u32(r2_1, r2_2);
440 r3_1 = veorq_u32(r3_1, r3_2);
441
442 r0_1 = RotateLeft<12>(r0_1);
443 r1_1 = RotateLeft<12>(r1_1);
444 r2_1 = RotateLeft<12>(r2_1);
445 r3_1 = RotateLeft<12>(r3_1);
446
447 r0_0 = vaddq_u32(r0_0, r0_1);
448 r1_0 = vaddq_u32(r1_0, r1_1);
449 r2_0 = vaddq_u32(r2_0, r2_1);
450 r3_0 = vaddq_u32(r3_0, r3_1);
451
452 r0_3 = veorq_u32(r0_3, r0_0);
453 r1_3 = veorq_u32(r1_3, r1_0);
454 r2_3 = veorq_u32(r2_3, r2_0);
455 r3_3 = veorq_u32(r3_3, r3_0);
456
457 r0_3 = RotateLeft<8>(r0_3);
458 r1_3 = RotateLeft<8>(r1_3);
459 r2_3 = RotateLeft<8>(r2_3);
460 r3_3 = RotateLeft<8>(r3_3);
461
462 r0_2 = vaddq_u32(r0_2, r0_3);
463 r1_2 = vaddq_u32(r1_2, r1_3);
464 r2_2 = vaddq_u32(r2_2, r2_3);
465 r3_2 = vaddq_u32(r3_2, r3_3);
466
467 r0_1 = veorq_u32(r0_1, r0_2);
468 r1_1 = veorq_u32(r1_1, r1_2);
469 r2_1 = veorq_u32(r2_1, r2_2);
470 r3_1 = veorq_u32(r3_1, r3_2);
471
472 r0_1 = RotateLeft<7>(r0_1);
473 r1_1 = RotateLeft<7>(r1_1);
474 r2_1 = RotateLeft<7>(r2_1);
475 r3_1 = RotateLeft<7>(r3_1);
476
477 r0_1 = Extract<3>(r0_1);
478 r0_2 = Extract<2>(r0_2);
479 r0_3 = Extract<1>(r0_3);
480
481 r1_1 = Extract<3>(r1_1);
482 r1_2 = Extract<2>(r1_2);
483 r1_3 = Extract<1>(r1_3);
484
485 r2_1 = Extract<3>(r2_1);
486 r2_2 = Extract<2>(r2_2);
487 r2_3 = Extract<1>(r2_3);
488
489 r3_1 = Extract<3>(r3_1);
490 r3_2 = Extract<2>(r3_2);
491 r3_3 = Extract<1>(r3_3);
492 }
493
494 r0_0 = vaddq_u32(r0_0, state0);
495 r0_1 = vaddq_u32(r0_1, state1);
496 r0_2 = vaddq_u32(r0_2, state2);
497 r0_3 = vaddq_u32(r0_3, state3_0);
498
499 r1_0 = vaddq_u32(r1_0, state0);
500 r1_1 = vaddq_u32(r1_1, state1);
501 r1_2 = vaddq_u32(r1_2, state2);
502 r1_3 = vaddq_u32(r1_3, state3_1);
503
504 r2_0 = vaddq_u32(r2_0, state0);
505 r2_1 = vaddq_u32(r2_1, state1);
506 r2_2 = vaddq_u32(r2_2, state2);
507 r2_3 = vaddq_u32(r2_3, state3_2);
508
509 r3_0 = vaddq_u32(r3_0, state0);
510 r3_1 = vaddq_u32(r3_1, state1);
511 r3_2 = vaddq_u32(r3_2, state2);
512 r3_3 = vaddq_u32(r3_3, state3_3);
513
514 if (input)
515 {
516 r0_0 = veorq_u32(vreinterpretq_u32_u8(vld1q_u8(input + 0*16)), r0_0);
517 r0_1 = veorq_u32(vreinterpretq_u32_u8(vld1q_u8(input + 1*16)), r0_1);
518 r0_2 = veorq_u32(vreinterpretq_u32_u8(vld1q_u8(input + 2*16)), r0_2);
519 r0_3 = veorq_u32(vreinterpretq_u32_u8(vld1q_u8(input + 3*16)), r0_3);
520 }
521
522 vst1q_u8(output + 0*16, vreinterpretq_u8_u32(r0_0));
523 vst1q_u8(output + 1*16, vreinterpretq_u8_u32(r0_1));
524 vst1q_u8(output + 2*16, vreinterpretq_u8_u32(r0_2));
525 vst1q_u8(output + 3*16, vreinterpretq_u8_u32(r0_3));
526
527 if (input)
528 {
529 r1_0 = veorq_u32(vreinterpretq_u32_u8(vld1q_u8(input + 4*16)), r1_0);
530 r1_1 = veorq_u32(vreinterpretq_u32_u8(vld1q_u8(input + 5*16)), r1_1);
531 r1_2 = veorq_u32(vreinterpretq_u32_u8(vld1q_u8(input + 6*16)), r1_2);
532 r1_3 = veorq_u32(vreinterpretq_u32_u8(vld1q_u8(input + 7*16)), r1_3);
533 }
534
535 vst1q_u8(output + 4*16, vreinterpretq_u8_u32(r1_0));
536 vst1q_u8(output + 5*16, vreinterpretq_u8_u32(r1_1));
537 vst1q_u8(output + 6*16, vreinterpretq_u8_u32(r1_2));
538 vst1q_u8(output + 7*16, vreinterpretq_u8_u32(r1_3));
539
540 if (input)
541 {
542 r2_0 = veorq_u32(vreinterpretq_u32_u8(vld1q_u8(input + 8*16)), r2_0);
543 r2_1 = veorq_u32(vreinterpretq_u32_u8(vld1q_u8(input + 9*16)), r2_1);
544 r2_2 = veorq_u32(vreinterpretq_u32_u8(vld1q_u8(input + 10*16)), r2_2);
545 r2_3 = veorq_u32(vreinterpretq_u32_u8(vld1q_u8(input + 11*16)), r2_3);
546 }
547
548 vst1q_u8(output + 8*16, vreinterpretq_u8_u32(r2_0));
549 vst1q_u8(output + 9*16, vreinterpretq_u8_u32(r2_1));
550 vst1q_u8(output + 10*16, vreinterpretq_u8_u32(r2_2));
551 vst1q_u8(output + 11*16, vreinterpretq_u8_u32(r2_3));
552
553 if (input)
554 {
555 r3_0 = veorq_u32(vreinterpretq_u32_u8(vld1q_u8(input + 12*16)), r3_0);
556 r3_1 = veorq_u32(vreinterpretq_u32_u8(vld1q_u8(input + 13*16)), r3_1);
557 r3_2 = veorq_u32(vreinterpretq_u32_u8(vld1q_u8(input + 14*16)), r3_2);
558 r3_3 = veorq_u32(vreinterpretq_u32_u8(vld1q_u8(input + 15*16)), r3_3);
559 }
560
561 vst1q_u8(output + 12*16, vreinterpretq_u8_u32(r3_0));
562 vst1q_u8(output + 13*16, vreinterpretq_u8_u32(r3_1));
563 vst1q_u8(output + 14*16, vreinterpretq_u8_u32(r3_2));
564 vst1q_u8(output + 15*16, vreinterpretq_u8_u32(r3_3));
565}
566
567#endif // CRYPTOPP_ARM_NEON_AVAILABLE
568
569// ***************************** SSE2 ***************************** //
570
571#if (CRYPTOPP_SSE2_INTRIN_AVAILABLE)
572
573void ChaCha_OperateKeystream_SSE2(const word32 *state, const byte* input, byte *output, unsigned int rounds)
574{
575 const __m128i state0 = _mm_load_si128(reinterpret_cast<const __m128i*>(state+0*4));
576 const __m128i state1 = _mm_load_si128(reinterpret_cast<const __m128i*>(state+1*4));
577 const __m128i state2 = _mm_load_si128(reinterpret_cast<const __m128i*>(state+2*4));
578 const __m128i state3 = _mm_load_si128(reinterpret_cast<const __m128i*>(state+3*4));
579
580 // Precompute each block's initial counter state.
581 // Feed-forward uses 32-bit word adds.
582 const __m128i state3_0 = state3;
583 const __m128i state3_1 = _mm_add_epi64(state3, _mm_set_epi32(0, 0, 0, 1));
584 const __m128i state3_2 = _mm_add_epi64(state3, _mm_set_epi32(0, 0, 0, 2));
585 const __m128i state3_3 = _mm_add_epi64(state3, _mm_set_epi32(0, 0, 0, 3));
586
587 __m128i r0_0 = state0;
588 __m128i r0_1 = state1;
589 __m128i r0_2 = state2;
590 __m128i r0_3 = state3_0;
591
592 __m128i r1_0 = state0;
593 __m128i r1_1 = state1;
594 __m128i r1_2 = state2;
595 __m128i r1_3 = state3_1;
596
597 __m128i r2_0 = state0;
598 __m128i r2_1 = state1;
599 __m128i r2_2 = state2;
600 __m128i r2_3 = state3_2;
601
602 __m128i r3_0 = state0;
603 __m128i r3_1 = state1;
604 __m128i r3_2 = state2;
605 __m128i r3_3 = state3_3;
606
607 for (int i = static_cast<int>(rounds); i > 0; i -= 2)
608 {
609 r0_0 = _mm_add_epi32(r0_0, r0_1);
610 r1_0 = _mm_add_epi32(r1_0, r1_1);
611 r2_0 = _mm_add_epi32(r2_0, r2_1);
612 r3_0 = _mm_add_epi32(r3_0, r3_1);
613
614 r0_3 = _mm_xor_si128(r0_3, r0_0);
615 r1_3 = _mm_xor_si128(r1_3, r1_0);
616 r2_3 = _mm_xor_si128(r2_3, r2_0);
617 r3_3 = _mm_xor_si128(r3_3, r3_0);
618
619 r0_3 = RotateLeft<16>(r0_3);
620 r1_3 = RotateLeft<16>(r1_3);
621 r2_3 = RotateLeft<16>(r2_3);
622 r3_3 = RotateLeft<16>(r3_3);
623
624 r0_2 = _mm_add_epi32(r0_2, r0_3);
625 r1_2 = _mm_add_epi32(r1_2, r1_3);
626 r2_2 = _mm_add_epi32(r2_2, r2_3);
627 r3_2 = _mm_add_epi32(r3_2, r3_3);
628
629 r0_1 = _mm_xor_si128(r0_1, r0_2);
630 r1_1 = _mm_xor_si128(r1_1, r1_2);
631 r2_1 = _mm_xor_si128(r2_1, r2_2);
632 r3_1 = _mm_xor_si128(r3_1, r3_2);
633
634 r0_1 = RotateLeft<12>(r0_1);
635 r1_1 = RotateLeft<12>(r1_1);
636 r2_1 = RotateLeft<12>(r2_1);
637 r3_1 = RotateLeft<12>(r3_1);
638
639 r0_0 = _mm_add_epi32(r0_0, r0_1);
640 r1_0 = _mm_add_epi32(r1_0, r1_1);
641 r2_0 = _mm_add_epi32(r2_0, r2_1);
642 r3_0 = _mm_add_epi32(r3_0, r3_1);
643
644 r0_3 = _mm_xor_si128(r0_3, r0_0);
645 r1_3 = _mm_xor_si128(r1_3, r1_0);
646 r2_3 = _mm_xor_si128(r2_3, r2_0);
647 r3_3 = _mm_xor_si128(r3_3, r3_0);
648
649 r0_3 = RotateLeft<8>(r0_3);
650 r1_3 = RotateLeft<8>(r1_3);
651 r2_3 = RotateLeft<8>(r2_3);
652 r3_3 = RotateLeft<8>(r3_3);
653
654 r0_2 = _mm_add_epi32(r0_2, r0_3);
655 r1_2 = _mm_add_epi32(r1_2, r1_3);
656 r2_2 = _mm_add_epi32(r2_2, r2_3);
657 r3_2 = _mm_add_epi32(r3_2, r3_3);
658
659 r0_1 = _mm_xor_si128(r0_1, r0_2);
660 r1_1 = _mm_xor_si128(r1_1, r1_2);
661 r2_1 = _mm_xor_si128(r2_1, r2_2);
662 r3_1 = _mm_xor_si128(r3_1, r3_2);
663
664 r0_1 = RotateLeft<7>(r0_1);
665 r1_1 = RotateLeft<7>(r1_1);
666 r2_1 = RotateLeft<7>(r2_1);
667 r3_1 = RotateLeft<7>(r3_1);
668
669 r0_1 = _mm_shuffle_epi32(r0_1, _MM_SHUFFLE(0, 3, 2, 1));
670 r0_2 = _mm_shuffle_epi32(r0_2, _MM_SHUFFLE(1, 0, 3, 2));
671 r0_3 = _mm_shuffle_epi32(r0_3, _MM_SHUFFLE(2, 1, 0, 3));
672
673 r1_1 = _mm_shuffle_epi32(r1_1, _MM_SHUFFLE(0, 3, 2, 1));
674 r1_2 = _mm_shuffle_epi32(r1_2, _MM_SHUFFLE(1, 0, 3, 2));
675 r1_3 = _mm_shuffle_epi32(r1_3, _MM_SHUFFLE(2, 1, 0, 3));
676
677 r2_1 = _mm_shuffle_epi32(r2_1, _MM_SHUFFLE(0, 3, 2, 1));
678 r2_2 = _mm_shuffle_epi32(r2_2, _MM_SHUFFLE(1, 0, 3, 2));
679 r2_3 = _mm_shuffle_epi32(r2_3, _MM_SHUFFLE(2, 1, 0, 3));
680
681 r3_1 = _mm_shuffle_epi32(r3_1, _MM_SHUFFLE(0, 3, 2, 1));
682 r3_2 = _mm_shuffle_epi32(r3_2, _MM_SHUFFLE(1, 0, 3, 2));
683 r3_3 = _mm_shuffle_epi32(r3_3, _MM_SHUFFLE(2, 1, 0, 3));
684
685 r0_0 = _mm_add_epi32(r0_0, r0_1);
686 r1_0 = _mm_add_epi32(r1_0, r1_1);
687 r2_0 = _mm_add_epi32(r2_0, r2_1);
688 r3_0 = _mm_add_epi32(r3_0, r3_1);
689
690 r0_3 = _mm_xor_si128(r0_3, r0_0);
691 r1_3 = _mm_xor_si128(r1_3, r1_0);
692 r2_3 = _mm_xor_si128(r2_3, r2_0);
693 r3_3 = _mm_xor_si128(r3_3, r3_0);
694
695 r0_3 = RotateLeft<16>(r0_3);
696 r1_3 = RotateLeft<16>(r1_3);
697 r2_3 = RotateLeft<16>(r2_3);
698 r3_3 = RotateLeft<16>(r3_3);
699
700 r0_2 = _mm_add_epi32(r0_2, r0_3);
701 r1_2 = _mm_add_epi32(r1_2, r1_3);
702 r2_2 = _mm_add_epi32(r2_2, r2_3);
703 r3_2 = _mm_add_epi32(r3_2, r3_3);
704
705 r0_1 = _mm_xor_si128(r0_1, r0_2);
706 r1_1 = _mm_xor_si128(r1_1, r1_2);
707 r2_1 = _mm_xor_si128(r2_1, r2_2);
708 r3_1 = _mm_xor_si128(r3_1, r3_2);
709
710 r0_1 = RotateLeft<12>(r0_1);
711 r1_1 = RotateLeft<12>(r1_1);
712 r2_1 = RotateLeft<12>(r2_1);
713 r3_1 = RotateLeft<12>(r3_1);
714
715 r0_0 = _mm_add_epi32(r0_0, r0_1);
716 r1_0 = _mm_add_epi32(r1_0, r1_1);
717 r2_0 = _mm_add_epi32(r2_0, r2_1);
718 r3_0 = _mm_add_epi32(r3_0, r3_1);
719
720 r0_3 = _mm_xor_si128(r0_3, r0_0);
721 r1_3 = _mm_xor_si128(r1_3, r1_0);
722 r2_3 = _mm_xor_si128(r2_3, r2_0);
723 r3_3 = _mm_xor_si128(r3_3, r3_0);
724
725 r0_3 = RotateLeft<8>(r0_3);
726 r1_3 = RotateLeft<8>(r1_3);
727 r2_3 = RotateLeft<8>(r2_3);
728 r3_3 = RotateLeft<8>(r3_3);
729
730 r0_2 = _mm_add_epi32(r0_2, r0_3);
731 r1_2 = _mm_add_epi32(r1_2, r1_3);
732 r2_2 = _mm_add_epi32(r2_2, r2_3);
733 r3_2 = _mm_add_epi32(r3_2, r3_3);
734
735 r0_1 = _mm_xor_si128(r0_1, r0_2);
736 r1_1 = _mm_xor_si128(r1_1, r1_2);
737 r2_1 = _mm_xor_si128(r2_1, r2_2);
738 r3_1 = _mm_xor_si128(r3_1, r3_2);
739
740 r0_1 = RotateLeft<7>(r0_1);
741 r1_1 = RotateLeft<7>(r1_1);
742 r2_1 = RotateLeft<7>(r2_1);
743 r3_1 = RotateLeft<7>(r3_1);
744
745 r0_1 = _mm_shuffle_epi32(r0_1, _MM_SHUFFLE(2, 1, 0, 3));
746 r0_2 = _mm_shuffle_epi32(r0_2, _MM_SHUFFLE(1, 0, 3, 2));
747 r0_3 = _mm_shuffle_epi32(r0_3, _MM_SHUFFLE(0, 3, 2, 1));
748
749 r1_1 = _mm_shuffle_epi32(r1_1, _MM_SHUFFLE(2, 1, 0, 3));
750 r1_2 = _mm_shuffle_epi32(r1_2, _MM_SHUFFLE(1, 0, 3, 2));
751 r1_3 = _mm_shuffle_epi32(r1_3, _MM_SHUFFLE(0, 3, 2, 1));
752
753 r2_1 = _mm_shuffle_epi32(r2_1, _MM_SHUFFLE(2, 1, 0, 3));
754 r2_2 = _mm_shuffle_epi32(r2_2, _MM_SHUFFLE(1, 0, 3, 2));
755 r2_3 = _mm_shuffle_epi32(r2_3, _MM_SHUFFLE(0, 3, 2, 1));
756
757 r3_1 = _mm_shuffle_epi32(r3_1, _MM_SHUFFLE(2, 1, 0, 3));
758 r3_2 = _mm_shuffle_epi32(r3_2, _MM_SHUFFLE(1, 0, 3, 2));
759 r3_3 = _mm_shuffle_epi32(r3_3, _MM_SHUFFLE(0, 3, 2, 1));
760 }
761
762 r0_0 = _mm_add_epi32(r0_0, state0);
763 r0_1 = _mm_add_epi32(r0_1, state1);
764 r0_2 = _mm_add_epi32(r0_2, state2);
765 r0_3 = _mm_add_epi32(r0_3, state3_0);
766
767 r1_0 = _mm_add_epi32(r1_0, state0);
768 r1_1 = _mm_add_epi32(r1_1, state1);
769 r1_2 = _mm_add_epi32(r1_2, state2);
770 r1_3 = _mm_add_epi32(r1_3, state3_1);
771
772 r2_0 = _mm_add_epi32(r2_0, state0);
773 r2_1 = _mm_add_epi32(r2_1, state1);
774 r2_2 = _mm_add_epi32(r2_2, state2);
775 r2_3 = _mm_add_epi32(r2_3, state3_2);
776
777 r3_0 = _mm_add_epi32(r3_0, state0);
778 r3_1 = _mm_add_epi32(r3_1, state1);
779 r3_2 = _mm_add_epi32(r3_2, state2);
780 r3_3 = _mm_add_epi32(r3_3, state3_3);
781
782 if (input)
783 {
784 r0_0 = _mm_xor_si128(_mm_loadu_si128(reinterpret_cast<const __m128i*>(input+0*16)), r0_0);
785 r0_1 = _mm_xor_si128(_mm_loadu_si128(reinterpret_cast<const __m128i*>(input+1*16)), r0_1);
786 r0_2 = _mm_xor_si128(_mm_loadu_si128(reinterpret_cast<const __m128i*>(input+2*16)), r0_2);
787 r0_3 = _mm_xor_si128(_mm_loadu_si128(reinterpret_cast<const __m128i*>(input+3*16)), r0_3);
788 }
789
790 _mm_storeu_si128(reinterpret_cast<__m128i*>(output+0*16), r0_0);
791 _mm_storeu_si128(reinterpret_cast<__m128i*>(output+1*16), r0_1);
792 _mm_storeu_si128(reinterpret_cast<__m128i*>(output+2*16), r0_2);
793 _mm_storeu_si128(reinterpret_cast<__m128i*>(output+3*16), r0_3);
794
795 if (input)
796 {
797 r1_0 = _mm_xor_si128(_mm_loadu_si128(reinterpret_cast<const __m128i*>(input+4*16)), r1_0);
798 r1_1 = _mm_xor_si128(_mm_loadu_si128(reinterpret_cast<const __m128i*>(input+5*16)), r1_1);
799 r1_2 = _mm_xor_si128(_mm_loadu_si128(reinterpret_cast<const __m128i*>(input+6*16)), r1_2);
800 r1_3 = _mm_xor_si128(_mm_loadu_si128(reinterpret_cast<const __m128i*>(input+7*16)), r1_3);
801 }
802
803 _mm_storeu_si128(reinterpret_cast<__m128i*>(output+4*16), r1_0);
804 _mm_storeu_si128(reinterpret_cast<__m128i*>(output+5*16), r1_1);
805 _mm_storeu_si128(reinterpret_cast<__m128i*>(output+6*16), r1_2);
806 _mm_storeu_si128(reinterpret_cast<__m128i*>(output+7*16), r1_3);
807
808 if (input)
809 {
810 r2_0 = _mm_xor_si128(_mm_loadu_si128(reinterpret_cast<const __m128i*>(input+ 8*16)), r2_0);
811 r2_1 = _mm_xor_si128(_mm_loadu_si128(reinterpret_cast<const __m128i*>(input+ 9*16)), r2_1);
812 r2_2 = _mm_xor_si128(_mm_loadu_si128(reinterpret_cast<const __m128i*>(input+10*16)), r2_2);
813 r2_3 = _mm_xor_si128(_mm_loadu_si128(reinterpret_cast<const __m128i*>(input+11*16)), r2_3);
814 }
815
816 _mm_storeu_si128(reinterpret_cast<__m128i*>(output+ 8*16), r2_0);
817 _mm_storeu_si128(reinterpret_cast<__m128i*>(output+ 9*16), r2_1);
818 _mm_storeu_si128(reinterpret_cast<__m128i*>(output+10*16), r2_2);
819 _mm_storeu_si128(reinterpret_cast<__m128i*>(output+11*16), r2_3);
820
821 if (input)
822 {
823 r3_0 = _mm_xor_si128(_mm_loadu_si128(reinterpret_cast<const __m128i*>(input+12*16)), r3_0);
824 r3_1 = _mm_xor_si128(_mm_loadu_si128(reinterpret_cast<const __m128i*>(input+13*16)), r3_1);
825 r3_2 = _mm_xor_si128(_mm_loadu_si128(reinterpret_cast<const __m128i*>(input+14*16)), r3_2);
826 r3_3 = _mm_xor_si128(_mm_loadu_si128(reinterpret_cast<const __m128i*>(input+15*16)), r3_3);
827 }
828
829 _mm_storeu_si128(reinterpret_cast<__m128i*>(output+12*16), r3_0);
830 _mm_storeu_si128(reinterpret_cast<__m128i*>(output+13*16), r3_1);
831 _mm_storeu_si128(reinterpret_cast<__m128i*>(output+14*16), r3_2);
832 _mm_storeu_si128(reinterpret_cast<__m128i*>(output+15*16), r3_3);
833}
834
835#endif // CRYPTOPP_SSE2_INTRIN_AVAILABLE
836
837#if (CRYPTOPP_ALTIVEC_AVAILABLE)
838
839// ChaCha_OperateKeystream_CORE will use either POWER7 or ALTIVEC,
840// depending on the flags used to compile this source file. The
841// abstractions are handled in VecLoad, VecStore and friends. In
842// the future we may to provide both POWER7 or ALTIVEC at the same
843// time to better support distros.
844inline void ChaCha_OperateKeystream_CORE(const word32 *state, const byte* input, byte *output, unsigned int rounds)
845{
846 const uint32x4_p state0 = VecLoadAligned(state + 0*4);
847 const uint32x4_p state1 = VecLoadAligned(state + 1*4);
848 const uint32x4_p state2 = VecLoadAligned(state + 2*4);
849 const uint32x4_p state3 = VecLoadAligned(state + 3*4);
850
851 const uint32x4_p CTRS[3] = {
852 {1,0,0,0}, {2,0,0,0}, {3,0,0,0}
853 };
854
855 // Precompute each block's initial counter state.
856 // Feed-forward uses 32-bit word adds.
857 const uint32x4_p state3_0 = state3;
858 const uint32x4_p state3_1 = VecAdd64(state3, CTRS[0]);
859 const uint32x4_p state3_2 = VecAdd64(state3, CTRS[1]);
860 const uint32x4_p state3_3 = VecAdd64(state3, CTRS[2]);
861
862 uint32x4_p r0_0 = state0;
863 uint32x4_p r0_1 = state1;
864 uint32x4_p r0_2 = state2;
865 uint32x4_p r0_3 = state3_0;
866
867 uint32x4_p r1_0 = state0;
868 uint32x4_p r1_1 = state1;
869 uint32x4_p r1_2 = state2;
870 uint32x4_p r1_3 = state3_1;
871
872 uint32x4_p r2_0 = state0;
873 uint32x4_p r2_1 = state1;
874 uint32x4_p r2_2 = state2;
875 uint32x4_p r2_3 = state3_2;
876
877 uint32x4_p r3_0 = state0;
878 uint32x4_p r3_1 = state1;
879 uint32x4_p r3_2 = state2;
880 uint32x4_p r3_3 = state3_3;
881
882 for (int i = static_cast<int>(rounds); i > 0; i -= 2)
883 {
884 r0_0 = VecAdd(r0_0, r0_1);
885 r1_0 = VecAdd(r1_0, r1_1);
886 r2_0 = VecAdd(r2_0, r2_1);
887 r3_0 = VecAdd(r3_0, r3_1);
888
889 r0_3 = VecXor(r0_3, r0_0);
890 r1_3 = VecXor(r1_3, r1_0);
891 r2_3 = VecXor(r2_3, r2_0);
892 r3_3 = VecXor(r3_3, r3_0);
893
894 r0_3 = VecRotateLeft<16>(r0_3);
895 r1_3 = VecRotateLeft<16>(r1_3);
896 r2_3 = VecRotateLeft<16>(r2_3);
897 r3_3 = VecRotateLeft<16>(r3_3);
898
899 r0_2 = VecAdd(r0_2, r0_3);
900 r1_2 = VecAdd(r1_2, r1_3);
901 r2_2 = VecAdd(r2_2, r2_3);
902 r3_2 = VecAdd(r3_2, r3_3);
903
904 r0_1 = VecXor(r0_1, r0_2);
905 r1_1 = VecXor(r1_1, r1_2);
906 r2_1 = VecXor(r2_1, r2_2);
907 r3_1 = VecXor(r3_1, r3_2);
908
909 r0_1 = VecRotateLeft<12>(r0_1);
910 r1_1 = VecRotateLeft<12>(r1_1);
911 r2_1 = VecRotateLeft<12>(r2_1);
912 r3_1 = VecRotateLeft<12>(r3_1);
913
914 r0_0 = VecAdd(r0_0, r0_1);
915 r1_0 = VecAdd(r1_0, r1_1);
916 r2_0 = VecAdd(r2_0, r2_1);
917 r3_0 = VecAdd(r3_0, r3_1);
918
919 r0_3 = VecXor(r0_3, r0_0);
920 r1_3 = VecXor(r1_3, r1_0);
921 r2_3 = VecXor(r2_3, r2_0);
922 r3_3 = VecXor(r3_3, r3_0);
923
924 r0_3 = VecRotateLeft<8>(r0_3);
925 r1_3 = VecRotateLeft<8>(r1_3);
926 r2_3 = VecRotateLeft<8>(r2_3);
927 r3_3 = VecRotateLeft<8>(r3_3);
928
929 r0_2 = VecAdd(r0_2, r0_3);
930 r1_2 = VecAdd(r1_2, r1_3);
931 r2_2 = VecAdd(r2_2, r2_3);
932 r3_2 = VecAdd(r3_2, r3_3);
933
934 r0_1 = VecXor(r0_1, r0_2);
935 r1_1 = VecXor(r1_1, r1_2);
936 r2_1 = VecXor(r2_1, r2_2);
937 r3_1 = VecXor(r3_1, r3_2);
938
939 r0_1 = VecRotateLeft<7>(r0_1);
940 r1_1 = VecRotateLeft<7>(r1_1);
941 r2_1 = VecRotateLeft<7>(r2_1);
942 r3_1 = VecRotateLeft<7>(r3_1);
943
944 r0_1 = Shuffle<1>(r0_1);
945 r0_2 = Shuffle<2>(r0_2);
946 r0_3 = Shuffle<3>(r0_3);
947
948 r1_1 = Shuffle<1>(r1_1);
949 r1_2 = Shuffle<2>(r1_2);
950 r1_3 = Shuffle<3>(r1_3);
951
952 r2_1 = Shuffle<1>(r2_1);
953 r2_2 = Shuffle<2>(r2_2);
954 r2_3 = Shuffle<3>(r2_3);
955
956 r3_1 = Shuffle<1>(r3_1);
957 r3_2 = Shuffle<2>(r3_2);
958 r3_3 = Shuffle<3>(r3_3);
959
960 r0_0 = VecAdd(r0_0, r0_1);
961 r1_0 = VecAdd(r1_0, r1_1);
962 r2_0 = VecAdd(r2_0, r2_1);
963 r3_0 = VecAdd(r3_0, r3_1);
964
965 r0_3 = VecXor(r0_3, r0_0);
966 r1_3 = VecXor(r1_3, r1_0);
967 r2_3 = VecXor(r2_3, r2_0);
968 r3_3 = VecXor(r3_3, r3_0);
969
970 r0_3 = VecRotateLeft<16>(r0_3);
971 r1_3 = VecRotateLeft<16>(r1_3);
972 r2_3 = VecRotateLeft<16>(r2_3);
973 r3_3 = VecRotateLeft<16>(r3_3);
974
975 r0_2 = VecAdd(r0_2, r0_3);
976 r1_2 = VecAdd(r1_2, r1_3);
977 r2_2 = VecAdd(r2_2, r2_3);
978 r3_2 = VecAdd(r3_2, r3_3);
979
980 r0_1 = VecXor(r0_1, r0_2);
981 r1_1 = VecXor(r1_1, r1_2);
982 r2_1 = VecXor(r2_1, r2_2);
983 r3_1 = VecXor(r3_1, r3_2);
984
985 r0_1 = VecRotateLeft<12>(r0_1);
986 r1_1 = VecRotateLeft<12>(r1_1);
987 r2_1 = VecRotateLeft<12>(r2_1);
988 r3_1 = VecRotateLeft<12>(r3_1);
989
990 r0_0 = VecAdd(r0_0, r0_1);
991 r1_0 = VecAdd(r1_0, r1_1);
992 r2_0 = VecAdd(r2_0, r2_1);
993 r3_0 = VecAdd(r3_0, r3_1);
994
995 r0_3 = VecXor(r0_3, r0_0);
996 r1_3 = VecXor(r1_3, r1_0);
997 r2_3 = VecXor(r2_3, r2_0);
998 r3_3 = VecXor(r3_3, r3_0);
999
1000 r0_3 = VecRotateLeft<8>(r0_3);
1001 r1_3 = VecRotateLeft<8>(r1_3);
1002 r2_3 = VecRotateLeft<8>(r2_3);
1003 r3_3 = VecRotateLeft<8>(r3_3);
1004
1005 r0_2 = VecAdd(r0_2, r0_3);
1006 r1_2 = VecAdd(r1_2, r1_3);
1007 r2_2 = VecAdd(r2_2, r2_3);
1008 r3_2 = VecAdd(r3_2, r3_3);
1009
1010 r0_1 = VecXor(r0_1, r0_2);
1011 r1_1 = VecXor(r1_1, r1_2);
1012 r2_1 = VecXor(r2_1, r2_2);
1013 r3_1 = VecXor(r3_1, r3_2);
1014
1015 r0_1 = VecRotateLeft<7>(r0_1);
1016 r1_1 = VecRotateLeft<7>(r1_1);
1017 r2_1 = VecRotateLeft<7>(r2_1);
1018 r3_1 = VecRotateLeft<7>(r3_1);
1019
1020 r0_1 = Shuffle<3>(r0_1);
1021 r0_2 = Shuffle<2>(r0_2);
1022 r0_3 = Shuffle<1>(r0_3);
1023
1024 r1_1 = Shuffle<3>(r1_1);
1025 r1_2 = Shuffle<2>(r1_2);
1026 r1_3 = Shuffle<1>(r1_3);
1027
1028 r2_1 = Shuffle<3>(r2_1);
1029 r2_2 = Shuffle<2>(r2_2);
1030 r2_3 = Shuffle<1>(r2_3);
1031
1032 r3_1 = Shuffle<3>(r3_1);
1033 r3_2 = Shuffle<2>(r3_2);
1034 r3_3 = Shuffle<1>(r3_3);
1035 }
1036
1037 r0_0 = VecAdd(r0_0, state0);
1038 r0_1 = VecAdd(r0_1, state1);
1039 r0_2 = VecAdd(r0_2, state2);
1040 r0_3 = VecAdd(r0_3, state3_0);
1041
1042 r1_0 = VecAdd(r1_0, state0);
1043 r1_1 = VecAdd(r1_1, state1);
1044 r1_2 = VecAdd(r1_2, state2);
1045 r1_3 = VecAdd(r1_3, state3_1);
1046
1047 r2_0 = VecAdd(r2_0, state0);
1048 r2_1 = VecAdd(r2_1, state1);
1049 r2_2 = VecAdd(r2_2, state2);
1050 r2_3 = VecAdd(r2_3, state3_2);
1051
1052 r3_0 = VecAdd(r3_0, state0);
1053 r3_1 = VecAdd(r3_1, state1);
1054 r3_2 = VecAdd(r3_2, state2);
1055 r3_3 = VecAdd(r3_3, state3_3);
1056
1057 if (input)
1058 {
1059 r0_0 = VecXor(VecLoad32LE(input + 0*16), r0_0);
1060 r0_1 = VecXor(VecLoad32LE(input + 1*16), r0_1);
1061 r0_2 = VecXor(VecLoad32LE(input + 2*16), r0_2);
1062 r0_3 = VecXor(VecLoad32LE(input + 3*16), r0_3);
1063 }
1064
1065 VecStore32LE(output + 0*16, r0_0);
1066 VecStore32LE(output + 1*16, r0_1);
1067 VecStore32LE(output + 2*16, r0_2);
1068 VecStore32LE(output + 3*16, r0_3);
1069
1070 if (input)
1071 {
1072 r1_0 = VecXor(VecLoad32LE(input + 4*16), r1_0);
1073 r1_1 = VecXor(VecLoad32LE(input + 5*16), r1_1);
1074 r1_2 = VecXor(VecLoad32LE(input + 6*16), r1_2);
1075 r1_3 = VecXor(VecLoad32LE(input + 7*16), r1_3);
1076 }
1077
1078 VecStore32LE(output + 4*16, r1_0);
1079 VecStore32LE(output + 5*16, r1_1);
1080 VecStore32LE(output + 6*16, r1_2);
1081 VecStore32LE(output + 7*16, r1_3);
1082
1083 if (input)
1084 {
1085 r2_0 = VecXor(VecLoad32LE(input + 8*16), r2_0);
1086 r2_1 = VecXor(VecLoad32LE(input + 9*16), r2_1);
1087 r2_2 = VecXor(VecLoad32LE(input + 10*16), r2_2);
1088 r2_3 = VecXor(VecLoad32LE(input + 11*16), r2_3);
1089 }
1090
1091 VecStore32LE(output + 8*16, r2_0);
1092 VecStore32LE(output + 9*16, r2_1);
1093 VecStore32LE(output + 10*16, r2_2);
1094 VecStore32LE(output + 11*16, r2_3);
1095
1096 if (input)
1097 {
1098 r3_0 = VecXor(VecLoad32LE(input + 12*16), r3_0);
1099 r3_1 = VecXor(VecLoad32LE(input + 13*16), r3_1);
1100 r3_2 = VecXor(VecLoad32LE(input + 14*16), r3_2);
1101 r3_3 = VecXor(VecLoad32LE(input + 15*16), r3_3);
1102 }
1103
1104 VecStore32LE(output + 12*16, r3_0);
1105 VecStore32LE(output + 13*16, r3_1);
1106 VecStore32LE(output + 14*16, r3_2);
1107 VecStore32LE(output + 15*16, r3_3);
1108}
1109
1110#endif // CRYPTOPP_ALTIVEC_AVAILABLE
1111
1112#if (CRYPTOPP_ALTIVEC_AVAILABLE)
1113
1114void ChaCha_OperateKeystream_ALTIVEC(const word32 *state, const byte* input, byte *output, unsigned int rounds)
1115{
1116 ChaCha_OperateKeystream_CORE(state, input, output, rounds);
1117}
1118
1119#endif
1120
1121NAMESPACE_END
Classes for ChaCha8, ChaCha12 and ChaCha20 stream ciphers.
Library configuration file.
unsigned int word32
32-bit unsigned datatype
Definition config_int.h:72
Utility functions for the Crypto++ library.
Crypto++ library namespace.
Precompiled header file.
Support functions for PowerPC and vector operations.
uint32x4_p VecLoadAligned(const byte src[16])
Loads a vector from an aligned byte array.
Definition ppc_simd.h:560
__vector unsigned int uint32x4_p
Vector of 32-bit elements.
Definition ppc_simd.h:202
T1 VecPermute(const T1 vec, const T2 mask)
Permutes a vector.
Definition ppc_simd.h:1478
__vector unsigned char uint8x16_p
Vector of 8-bit elements.
Definition ppc_simd.h:192
T1 VecXor(const T1 vec1, const T2 vec2)
XOR two vectors.
Definition ppc_simd.h:1414
T1 VecAdd(const T1 vec1, const T2 vec2)
Add two vectors.
Definition ppc_simd.h:1438
uint32x4_p VecRotateLeft(const uint32x4_p vec)
Rotate a vector left.
Definition ppc_simd.h:1660
void VecStore(const T data, byte dest[16])
Stores a vector to a byte array.
Definition ppc_simd.h:895
uint32x4_p VecAdd64(const uint32x4_p &vec1, const uint32x4_p &vec2)
Add two vectors as if uint64x2_p.
Definition ppc_simd.h:2014
uint32x4_p VecLoad(const byte src[16])
Loads a vector from a byte array.
Definition ppc_simd.h:369
#define CRYPTOPP_ASSERT(exp)
Debugging and diagnostic assertion.
Definition trap.h:68